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Home/Engineering/Finite State Machine

Finite State Machine

A finite state machine (FSM) is a fundamental computational model used to design sequential logic circuits and control systems. This simulator specifically models a Moore-type finite state machine that controls a standard traffic light sequence. The system cycles through three distinct states: Green, Yellow, and Red. In a Moore machine, the outputs (the color of the light) depend solely on the current state, which is a key distinction from a Mealy machine where outputs can depend on both state and input. The core principle is discrete-state, clock-driven logic. The system's behavior is defined by a state transition function, often represented as δ(current_state, input) = next_state, and an output function λ(current_state) = output. Here, the input is either a periodic clock pulse (in automatic mode) or a manual step command. The state graph, or diagram, visually represents the system's logic with nodes for states and directed edges for transitions. By interacting, students learn to map real-world control problems (like a traffic light) to an abstract model with defined states, transitions, and outputs. They explore the deterministic nature of FSMs and see how a simple set of rules (Green→Yellow→Red→Green) can create a reliable, repeating cycle. The simulator simplifies real-world complexities by ignoring sensor inputs (like car detection), assuming perfect timing, and modeling the lights as instantaneous, ideal outputs.

Who it's for: Undergraduate students in computer engineering, computer science, or electrical engineering courses covering digital logic design, sequential circuits, or automata theory.

Key terms

  • Finite State Machine (FSM)
  • Moore Machine
  • State Transition
  • Sequential Logic
  • State Diagram
  • Clock Signal
  • Digital Control System
  • Discrete States

FSM

4
1.2
3.5

Three states, cyclic transitions on timeouts. Same pattern models conveyors, game AI phases, and protocol handshakes — outputs depend only on current state and inputs.

Shortcuts

  • •Toggle Auto vs Manual, then adjust hold times
  • •In Manual, use Step transition to advance the cycle

Measured values

Current statered
Phase timer0.0 / 3.5 s

How it works

A minimal Moore-style machine: each state drives the lamp outputs; time events trigger the next state. The graph on the right is the state diagram.

Frequently asked questions

What's the difference between a Moore machine and a Mealy machine?
In a Moore machine, the outputs are determined solely by the current state. In this simulator, the light color is tied directly to the state (e.g., the 'Green' state always outputs a green light). In a Mealy machine, outputs can depend on both the current state AND the current input. This distinction affects the design of the state graph and the timing of output changes.
Why is this called a 'finite' state machine?
The machine has a finite, countable number of distinct states—in this case, exactly three: Green, Yellow, and Red. It cannot be in an intermediate or undefined condition; it is always definitively in one of these predefined states. This finiteness makes the machine's behavior predictable and easily analyzable.
How does the clock work in the automatic mode?
The clock generates a regular, periodic pulse. On each pulse (or 'tick'), the state machine evaluates its transition rules. If the rule for the current state says to change on a clock tick, it advances to the next state. The duration each light stays on is determined by how many clock cycles the machine is designed to remain in that state before the tick triggers a transition.
Is a traffic light controller a realistic use for an FSM?
Absolutely. Simple timed traffic lights are a classic, real-world example of an FSM. More advanced controllers that include sensors (e.g., for turn lanes or pedestrian crossings) are also FSMs, but with more states and inputs. This simulator models the core timed cycle, which is the basis for more complex implementations.